Anschlußmöglichkeiten TFT

Symbols 	In/Out 		Logics 		Description 
EXTCLK 		In Note 1 	– 		External clock 
EXTCLK			 			becomes active, when EXTCSL is “H“ 


EXTCSL 		In Note 1 	Positive 	Clock select signal H: External clock 
						Default value is L L: Internal clock 


HS 		In Note 1 	Negative 	Horizontal synchronous signal 
VS 		In Note 1 	Negative 	Vertical synchronous signal 
HOUT 		Out Note 1 	Negative 	Horizontal synchronous signal output 
VOUT 		Out Note 1 	Negative 	Vertical synchronous signal output 
R 		In 		– 		Analog Red signal 0.7 Vp-p Zi = 75 W 
G 		In 		– 		Analog Green signal 0.7 Vp-p Zi = 75 W 
B 		In 		– 		Analog Blue signal 0.7 Vp-p Zi = 75 W 
R/L 		In Note 1 	– 		Horizontal scanning select signal H: Right scanning 
						Default value is L L: Left scanning 
U/D 		In Note 1 	– 		Vertical scanning select signal H: down scanning 
						Default value is L L: up scanning 
N/P 		In Note 1 	– 		Display mode select H: PAL mode 
						Default value is L L: NTSC mode 
MTSL 		In Note 1 	– 		Vertical display area select signal H: 240 lines 
						Default value is L L: 234 lines 
BPLS 		In Note 1 	– 		Luminance control signal (pulse input) 
						Luminance is controlled by the pulse width. 
						Duty 100%: luminance Max. Refer to P17 (note 8). 
VDC 		In 		– 		Power supply for processor, controller and driver (+9.5 V) 
VDCB 		In 		– 		Power supply for backlight (+9.5 V) 
GNDA 		– Note 2 	– 		Ground for analog RGB signal 
GNDD 		– Note 2 	– 		Ground for logic (VDC) and backlight (VDCB) 




Note 1 - CMOS Level
Note 2 - GNDA should be separated from GNDD to aboid display noise.